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Design a 4-to-16-line decoder with enable using five 2 -to-4 line decoders with enable. Design an 8-to-1-line multiplexer using a 3-to-8-line decoder, 8 2-input AND gates and an 8- input OR gate. Repeat (2) using two 4-1-line multiplexers and one 2-to-1-line multiplexer. A combinational circuit is defined by the following three Boolean functions. F1=(x+Z)^(')+xYZ F2=(x+Z)^(')+x^(')YZ F3=xY^(')Z+(x+Z)^(') Design the circuit with a decoder and external OR gates. Implement the following Boolean fun
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