A close look at the circuit reveals that it consists of a discrete D-type flip-flop formed by NAND gates U1a-U1c. The setup delay of the LS series gates is around 10 ns. This causes the settling ...

He trimmed the component count down to a single CMOS chip (a quad Schmitt trigger NAND), a couple of switching transistors, the MOSFETs that drive the coils, and a few passives.