As VLSI technology scales to 90 nanometers and beyond, ASIC vendors increasingly see power grid integrity issues in their designs and in the field, for two primary reasons. First, deep-submicron ...

Power integrity is becoming a bigger problem at 10/7nm because existing tools such as static analysis no longer are sufficient. Power integrity is a function of static and dynamic voltage drop in the ...

As a fundamental concept of electronic design, voltage drop ranks highly as one to understand well. I particularly appreciate when industry folks come up with creative ways to get the point across.

Large macros and memories used in system-on-a-chip (SoC) designs can save time, but they can also be a bear when it comes to verifying them from a power-integrity standpoint. Their internal physical ...

SANTA CRUZ, Calif. — IC power specialist Sequence Design has rolled out new features for its CoolTime and CoolPower analysis and optimization tools, including what the company calls SMMART, or ...

Deep-submicron systems-on-a-chip (SoCs) require a power-grid voltage drop of much less than 10% of VDD. Decoupling capacitors, or decaps, help achieve this goal by minimizing switching noise.

Set-Top-Box(STB) SoC designs are extremely complex with multi-million standard cells, higher core utilization of around 70-80 %, and multiple clock domains including high and low frequencies. An ...

Jointly developed solution, built on industry golden Synopsys PrimeTime signoff technology and Ansys RedHawk-SC, prevents dynamic voltage-drop- (DVD-) induced failures and minimizes timing pessimism ...

Optimising electrical balance-of-system architecture offers a solution to voltage drop in utility-scale solar while ...

Series voltage drop is the progressive loss of voltage that occurs when feeding a string of parallel-connected loads. It's of particular concern when feeding a string of roadway, walkway, or parking ...